Enabling SPD writes on the the latest Intel 8 & 9 series PCH

The reason for writing this technical note is to clear an issue with disabling SPD writes on the latest 8 and 9 series Intel chipsets and to help users to find a possible solution.

Beginning from 8 series chipset Intel used the fourth bit of the HOSTC register of the SMBus Controller to disable SPD write commands to addresses 50h – 57h. Moreover, Intel wants this bit to be set by BIOS to “1” by default what clearly explains Intel’s attitude to SPD reprogramming: Intel against any modifications within SPD content.

Until recently the SPD Write Disable bit was set for laptops, but now the problem seems to be relevant for desktops too. Thus, this bit can be found to be set “1” for ASUS MAXIMUS VII GENE motherboard with Z97 chipset. I believe other motherboard manufacturers will also comply with a new Intel requirement.

Anyway, to check the status of the SPD Write Disable bit you can create a register dump file by Thaiphoon Burner, click “Help”, “Need Assistance?”. Now open DeviceDump.txt file and locate something like the following:

SMBus Controller - B:00h D:1Fh F:03h

0000: 8CA28086 02800003 0C050000 00000000
0010: F7E38004 00000000 00000000 00000000
0020: 0000F041 00000000 00000000 85341043
0030: 00000000 00000000 00000000 00000306
0040: 00000011 00000000 00000000 00000000
0050: 00000000 00000000 00000000 00000000
0060: 00040403 08080000 00000000 00000000
0070: 00000000 00000000 00000000 00000000
0080: 00000004 00000000 00000000 00000000
0090: 00000000 00000000 00000000 00000000
00A0: 00000000 00000000 00000000 00000000
00B0: 00000000 00000000 00000000 00000000
00C0: 00000000 00000000 00000000 00000000
00D0: 00000000 00000000 00000000 00000000
00E0: 00000000 00000000 00000000 00000000
00F0: 00000000 00000000 08000FB1 00000000

Now check byte 40h. As you can see, it is set to 11h (bit 4 is set to “1”) what means SPD Writes are disabled. 01h means that SPD Write commands are not disabled by BIOS.

So, how to reset the SPD Write Disable bit? Unfortunately, once it has been set it cannot be cleared by software. However, the technical documentation on 8 series Intel chipset PCH tells us that the bit can be cleared by asserting PLTRST# signal. PLTRST# is a platform reset. The PCH asserts this signal to reset devices on the platform (such as SIO, FWH, LAN, processor, and so on). The PCH asserts PLTRST# during power-up and when software initiates a hard reset sequence through the Reset Control register (I/O port CF9h). So, this is exactly what we need. We just need to write 06h to I/O port CF9h to assert PLTRST# to clear the SPD Write Disable bit.

I hope this will be a possible solution for the issue I have described. Soon will try to use it on practice with the help of a new version of Thaiphoon Burner utility.

 

OK, so when you run Thaiphoon Burner you may receive the following message.



This means BIOS programmed SMBus Controller (SPD Write Disable bit is set to "1') to discard all Write commands to addresses 50h - 57h where SPD EEPROM chips reside. As I mentioned, the only way to clear the bit is to issue PLTRST# signal. To do that from the SMBus main menu of Thaiphoon Burner utility select the Perform a Host Reset command. The following message will appear.



Before clicking Yes make sure you are not running important applications. Otherwise your data may be totally lost. After clicking Yes you will see a black screen at once. POST control will be skipped what is good for us and your OS will reboot. Once your OS is loaded, run Thaiphoon Burner again. If you have not receive a warning message about disabled SPD Writes then the trick was successful - the SPD Write Disable bit is cleared.

Well, I can't personally test this solution since I don't have a system with disabled SPD Writes. Therefore, this forum is the only place where I decided to share my investigation and a test version of Thaiphoon Burner 9.1.1.0 build 0609

 

Hello TURBODUDE,

Tried with the 0609 version a Host Reset on my Maximus VII Gene. The system restarted but after running 0609 again I recieved the same message

 

Clevo W230ST, same thing here. Only the onboard dGPU was gone for good until the next power cycle.

Let me know if something can be hexed in one of the smbus modules on BIOS side...I would implement it into all my Mods, so people can directly use Thaiphoon on Haswell+ models.

 

Prema, thanks for letting me know about that. If I would have a BIOS source code for Intel platform I would have a working solution. But I have got BIOS source codes for AMD platforms only (RS780, Kabini, etc).

 

TURBODUDE!!!, would you happen to have made any progress with locating an Intel BIOS source code? I'm also having issues with the SMBus write issues. I have a laptop with extremely fast ram (for a laptop), but an unable to run the clocks speeds they're capable of.

Currently running 2133MHz memory at only 1066MHz.

 

Very unlikely a CF9 reset will work unless BIOS is buggy. CF9 is quite often used through ACPI by Windows as a method of restarting.

Probably going to have to dig in the BIOS for this. IIRC for my MSI it's in the SMBUS module.

 

Actually 1066 is 1/2 2133 so this may be your program reading the non-ddr speed. Once DDR is applied to 1066 you have the DDR 2133 memory.

 

I found out that "SPD Write Disable" feature does not work properly on LGA2011 v1/v2 platform. Despite it is enabled it still lets to reprogram SPD EEPROM. At least "SPD Write Disable" does not work on Clevo P570WM notebook with BIOS 1.03.05PM v4.

 

This feature does not work on my MSI GT60 laptop with HM87 chipset

 

Now it is possible on your laptop. After some bios modifications.

 

Good news! I'll with a big help of one very good guy, could find where and how you can unlock the write protection of SPD chip in the devices with 8 and 9 series of chipsets. The solution is found only for laptops and desktop motherboards, whose BIOS is based on the platform of AMI Aptio.
I will not describe the whole procedure of finding this solution, as it is not easy and not trivial.
So, i'll just briefly describe what should be done that would remove this harmful lok.
Of course for first step, you should make a backup of stock native BIOS from your device. One copy you need to keep in a safe place, just in case. Then download the excellent utility UEFITool on this link here: https://github.com/LongSoft/UEFITool/releases/download/0.20.4/UEFITool_0.20.4_win.7z
Run this utility and open in it your file backup of BIOS. Run search, select the settings in the search as text, and start searching for the keyword SmBusPei. In the bottom of the window, you will see a search result: "Unicode text "SmBusPei" found in User interface section at offset ...". Double-click on this line, and in the main window you will see the highlighted line: "User interface section". Go to one line higher to: “PE 32 image section”, right click mouse and select “Extract as is…” Select the path and any name with extension .bin (for example Pei.bin) and click “Save”. Do not exit from UEFITool.
Open extracted file Pei.bin in any Hex editor, and run search as hexadecimal values, start searching for the values: 1853BF40
When line with this values will found, just change it to 0853BF40, then save the file(for example as PeiMod.bin).
Now go in UEFUTool, right click mouse on the highlighted line: “PE 32 image section” and select “Replace as is…”, choice your file PeiMod.bin and click “Open”. Now go in menu “File” and click “Save image file…”, select the path and any name with extension .bin (for example MODbios.bin) and save your mod bios. Profit! You already make your mod bios. Now just flash it, and enjoy with Thaiphoon Burner on the your new device with 8 or 9 series of chipsets.

If for someone this guide seems too complex or difficult, you can write me PM or email: [email protected]

 

I can also confirm that all my Mods for Clevo systems will have the SPD write feature for Thaiphoon Burner enabled again by default.

 

Hi Prema!
That very nice! Your mods use very much guys, and now they will be able to fully use the wonderful program Thaiphoon Burner, now with write function.

 

Klem66, I used your workaround to write a small article for Tips&Trics at http://softnology.biz/tips_spdwritecap.html
It is draft version, but anyway it would be interesting for many of us. Thanks for your help!

 

TURBODUDE!!!
Nice article. I hope, it also helpfull for understanding how works this unlock.

 

Hi guys!

I just want to let you know that my new article Patching BIOS for enabling SPD programming on Intel 100 Series Chipset Family PCH has been published.