Overclocking P8400 | PM45

I thought I might have a go at CPU overclocking just for the hell of it before it becomes too hard, but would prefer a software solution to increasing the core voltage if possible. Anyone know what needs to be done?

Trouble is AFAIK my clock generator does not have any overclocking possibility other than changing the PLL from 266MHz to 333MHz so the software change would have to be done at boot time.

The laptop is a CQ45, system board very similar to the older DV4s.

 

So what PLL is it?

 

It's the one you posted a link for earlier SLG8SP553V. Thanks for that by the way, the only datasheet I could find was for the 64pin version.

Unless there is some obscure factory test code to change clocks as far as I can see it's pretty much a going to have to be a 266MHz to 333MHz change which I believe will require a VID increase.

 

Ok, download setfsb and select SLG8SP513V.
press diagnosis, then press getfsb. then press capture. please post the screenshot in the capture folder here.

you can try to move the top slider to the right a little then press setfsb to overclock. It may work but just post the screenshot first so we can see your PLL registers.

 

be carefull this may void your warrenty and destroy the notebook!!

 

BTW, you can email abo about support for your PLL, read his website for instructions and make sure the email is polite or he may not help.

Also you may wan't to read the following thread:
http://forum.notebookreview.com/showthread.php?t=393027

 

SetFSB will not work with this chip, it is a low cost Montevina custom chip that has no special divide by M/N overclock registers.

I have already been able to set 333MHz / FSB 1333MHz but cannot get Windows or other MP OSes to fully boot without crashing. I am thinking it is because the CPU core voltage is too low but I'm only guessing. Not having tried CPU OC before it could be something else I suppose.

The strange thing is if I disable one of the cores I can boot into Windows with no problem and the ironic thing is because I'm only using one core the x9.0 muliplier is enabled resulting in a CPU clock close to 3GHz.

Running Orthos with the one enabled core and default VID results in errors, but using nhc to step the voltage up one notch seems to sort it out. I'm reluctant to do any more testing until I get this VID sorted as running just one core defeats the purpose of OCing.

 

maybe you can do a voltmod?

 

Umm... I was hoping to avoid that. I'll have to have a think and see what I can do. Shame I don't have an overclockable chip such as yourself.

FWIW here's a CPUZ validation, at least the northbridge seems up to it at 1333MHz

​

 

I know this is a stupid question but I will ask it anyway;
does your bios allow you to lower the multiplier?

 

Or maybe it's your memory. You could try different timings or different memory.

 

I'v been looking at your PLL datasheet and it has a lot of reserved registers.
Also every page says "Preliminary".

I believe it will work with setfsb.
I think that the datasheet will be updated soon and some of those reserved registers will have discriptions, including maybe M/N programing registers.
I think byte 13 (control register 13) is going to be one.

Download setfsb and select SLG8SP513V. it should work.

I have also looked at these:
http://www.silego.com/resources/pdf/xSLG8SP514r10_07242007.pdf
http://www.silego.com/resources/pdf/xSLG8SP512r10_07242007.pdf
http://www.silego.com/resources/pdf/xSLG8SP533r11_07242007.pdf

they are simmilar to your PLL and they also have a lot of reserved registers.
also it's impossible to find the SLG8SP513V datasheet.

I think all of these PLLs are very simmilar and should all have M/N programming registers.

 

BIOS doesn't allow to do much more than change the date/time.

Running DDR2 800 at 1GHz could very well cause problems but I would have expected to see crashes with just one core, which boots okay, if that where the case. Still a good point though. I went ahead and knocked a module down to 333MHz from 400 with spdtool so it runs at ~415 or 830MHz. Still crashes as before. Also when the Linux distros crash (panic) on boot they gave CPU errors.

You could be onto something there, but if your right then register 9 says TME is on so I would have to find that pin, if it exists. Maybe PCI_2. Certainly worth a try though as it would be so nice to have a solution like that.

What I would like to do is disable speedstep, at least until I can get booted properly but it's been locked by the BIOS of course The other thing I'd like to look at is the ACPI p-state tables and see if something can be done there. I also wonder if the max core limit of 1.2V is enough, might mean having to get ugly with the hardware.

cpuz seems off by a fair bit with the core voltages but while I was playing with the multipliers this made me laugh.



It's really 7.5x multiplier so half that core speed. At least cpuz didn't validate it

 

Hopefully there will be an update of your datasheet soon.

 

There are two things I can think of that you could do to check if TME shares a pin with PCI2.

1. You could follow the track from the PCI2 pin and see if it does anything interesting. For example my track branched out, one of the branches led to a resistor while the other led to a pad which can have a resistor yet there was no resistor there. I tested points with a multimeter and found that the cut branch (the one without a resistor) led to GND. I moved the resistor from the other branch to this one and it worked.

2. You could go and start looking at different PLL datasheets and see if the PCI2 shares a pin with TME. If you see a pattern forming where in most cases they share a pin, then you could conclude that your TME is going to share the PCI2 pin.
I can help you with this part by also looking at different datasheets and I will post what I find here.

 

I have found a very interesting PLL, datasheet here:
http://www.silego.com/resources/pdf/xSLG8UM540r03_10232007.pdf

It has M/N programming registers and the TME register and TME shares the PCI2 pin.


Edit: Looks like you might have a "Watchdog Timer" that would have to be stopped. I guess you really do need a good datasheet.

 

It looks as though those reserved registers are there just for compatibility after all. The frequency control register (14) which is reserved on this chip even reflects the FS_A/B/C power-on latch state and even though I can select SW as the source (which shouldn't be possible with TME enabled) it doesn't allow me to change the frequency selection.

The datasheet you provided for the 553 seems pretty much compatible with the 533V. The registers appear to line up well and most if not all the pins.

It's no problem if I don't get the overclock to work, it was more of a curiosity thing than anything else.

 

Well I ended up doing a hardware mod to bump up the core voltage (~3.5%) and that seems to have got things working. Once I get sometime I'll have to look into stability. Not so worried about the CPU, after 10mins of Orthos at 2833MHz cores were less than 40C above ambient.

 

That core will take a solid 3 Ghz if its any good, possibly further no real word on how these penryns max out. JacobXavierMason has the world record on a P8400 with his FSB pushed to 347 mhz using setfsb on his stock ram everything on stock voltages.

Nice work so far.

 

Thanks for that Clutch, that's good to know. Since I don't have a programmable FSB divider on the PLL the option to go higher would mean using a 400MHz / 1600MHz FSB so I don't think that will be happening lol. Much nicer way to do it using a PLL divider IMO but beggars can't be choosers

I have adjusted the core voltage up to 6% for now, after longer testing 3.5% was a little unstable still. So I guess the question is whether to incorporate a full HW mod or not, ie to permanently overclock or not.

I was thinking about adding a bit of circuitry to make it switchable but probably not worth the effort. Most of the time the notebook is running off AC and I could probably force lower clock multipliers if I need to run off the battery.

The DDR2 800MHz RAM is still at the 415MHz clock (830MHz effective), I haven't try going back to the 500MHz clock as yet.

Thanks to moral for support. I think if it had been left up to his brother Hap's methods then it probably wouldn't have happened.

 

Have you thought about a "burn in" to make it stable at a lower voltage?
I don't know if it really works, or if it will work for you but it may be worth a try.

Also what does "brother Hap's methods" mean? I really don't know.

 

Orthos has been going for over 3 1/2 hours now and all looks fine. A little bit more heat, but nothing I don't feel the system can handle. I could always drop the VID through software but I'm not going to worry about it for now.

moral hazard ---> brother hap = hap hazard

 

no, I don't mean a burn in to check if it's stable, I mean a burn in to make it stable.

Some people have reported that their overclock was unstable but after a burn in they magically became stable.

here is a link to what I mean:
http://freenet-homepage.de/s.urfer/conditioning.htm

 

I figured that was what you meant, but I'm happy with the way it is performing as is.

 

could you describe how you got too 333 mhz? wanted to try that om my Pm45

 

It was done by pulling a pin high on the PLL (clock generator).
simmilar to this:
http://forum.notebookreview.com/showthread.php?t=401682

If you know what PLL you have, I can help you.

Also you might want to read this thread:
http://forum.notebookreview.com/showthread.php?t=393027