PLL-chip behaves weird

Hello,

I joined this forum since it's got a very nice thread about overclocking on Linux. This one: http://forum.notebookreview.com/linux-compatibility-software/430230-softfsb-ocing-4-linux-dev.html
It also covers what I want to do -> use the PLL-chip vor overclocking. But I ran over a problem, which is a rather unpopular pll-chip (ICS932S421). Luckily I found a datasheet https://www.idt.com/document/dst/932s421b

But I find the chip behaving a bit strange: Reading the CPU Frequency Control Registers gives me different values depending on wether the "CPU and SRC
M/N Programming Enable"-Bit is high or low.

Code:

[root@XeonArch ~]# modprobe i2c-dev
[root@XeonArch ~]# i2cdump -y 0 0x69 s 9
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 2b 43 d0 3c eb 27 cd                               +C?_?'?
[root@XeonArch ~]# i2cset -y 0 0x69 10 0xC3 s
[root@XeonArch ~]# i2cdump -y 0 0x69 s 9
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 2b c3 4e e1 fa 27 ce                               +?N??'?

Let me talk you through this:

• first I read the registers from number 9 onwards. They represent (see datasheet page 15 and 16):
  • 9: Device ID Register, it holds the value 0x2b, as it says in the datasheet
  • 10: M/N Programming & Control Register -> Bit 7 in this register is the "CPU and SRC M/N Programming Enable"-Bit. The value is0x43, which equals 0b01000011, so programming is disabled
  • 11+12: (0xd0, 0x3c) They are both CPU Frequency Control Registers and hold their certain values
• I write 0xc3 to register 10. This is the same as 0x43 excep bit 7 is set -> "CPU and SRC M/N Programming Enable"-Bit is now high
• I reread the registers from number 9 onwards. As you can see programming is enabled (0xc3), but the two following bytes changed from 0xd0 0x3c to 0x4e 0xe1. This means they now represent another cpu freqency...

I have absolutely no idea why the chip does this. So I would be very glad if someone could help me

(This is important for me since I discovered it would be smart to first write the frequency-control-registers and then enable programming. This way the information of both registers gets latched in at exactly the same time. Otherwise I would have a quite random cpu-frequency between writing each of the two bytes (which then stops the cpu from working before it can write the second byte fia i2c))

greetings
schuhumi

PS: Sorry if an important information is missing. This is my first time overclocking so I'm absolutely not familiar with all these things..
PPS: I wasn't sure wether to post in the linked thread or open a new topic. Since it's consindered rude to dig up old threads in the forums I know, I did it this way - sorry if that was wrong