An experience voltmoding Intel EIST enabled CPU

Hi, I’m one of those people that can’t calm down until they get the max out of their hardware. Most of the people do already know about RMClock utility that enables you to customize CPU power state levels, overwrite the original that the manufacturer has written inside of it. The problem is that the default offered CPU vid range is limited by the manufacturer and written in the CPU itself. And the CPU that offer with lower vid settings are far more expensive (low voltage and ultra low voltage series).
Here’s for example the lowest VID’s I could set on my T7500 CPU:

As you can see from the screen above, starting from 7x200=1400MHz the voltage is 0.9V and that is because lower VID’s are block. And Super Low Frequency mode operates on 6x100=600MHz (by default 8x100=800MHz). So the first thing that comes in mind is that there must be some unused potential, and it is true since Intel products all of its’ exact platform CPU’s with the same core in my case Meron (with IDA and SLFM support).
How to use that potential to extend battery life? The answer is hardware voltmoding.
With some luck I came on an article explaining on how fvid settings are applied in speed step CPUs:
http://www.ocforums.com/showthread.php?t=452126
I won’t rewrite that is already written, just make some note on how to choose and apply the best suitable voltmode.

1) Find the lowest VID’s CPU for every P State with which CPU doesn’t lose stability. In my case the lowest vids are shown in the picture above.

2) Find and note the default VIDs that your CPU uses when it starts. For example:


3) Download CPU manual. It’s not difficult since all of Intel CPU manuals are freely excisable for download on the official website . Meron Santa Rosa specification - Intel® Core™2 Duo Processors and Intel® Core™2 Extreme Processors for Platforms based on Mobile Intel® 965 Express Chipset Family Datasheet.

4) The information needed from specification manual to know the microcode of VIDs. Here is Voltage Identification table part that was available by the start:
(the numbers are VID5 VID4 VID3 VID2 VID1 VID0 respectively)
6 5 4 3 2 1 0 Vcc (V)
0 0 1 0 0 1 0 1.2750 – Default IDA VID (Intel Dynamic Acceleration) and also max available VID.
0 0 1 0 0 1 1 1.2625
0 0 1 0 1 0 0 1.2500 – Default 11x
0 0 1 0 1 0 1 1.2375
0 0 1 0 1 1 0 1.2250
0 0 1 0 1 1 1 1.2125
0 0 1 1 0 0 0 1.2000
0 0 1 1 0 0 1 1.1875
0 0 1 1 0 1 0 1.1750– Default 10x
0 0 1 1 0 1 1 1.1625
0 0 1 1 1 0 0 1.1500
0 0 1 1 1 0 1 1.1375 – Minimal IDA (12x)
0 0 1 1 1 1 0 1.1250
0 0 1 1 1 1 1 1.1125 – Default 9x
0 1 0 0 0 0 0 1.1000
0 1 0 0 0 0 1 1.0875
0 1 0 0 0 1 0 1.0750 – Minimal 11x
0 1 0 0 0 1 1 1.0625
0 1 0 0 1 0 0 1.0500
0 1 0 0 1 0 1 1.0375 – Default 8x
0 1 0 0 1 1 0 1.0250
0 1 0 0 1 1 1 1.0125 – Minimal 10x
0 1 0 1 0 0 0 1.0000
0 1 0 1 0 0 1 0.9875
0 1 0 1 0 1 0 0.9750 – Default 7x
0 1 0 1 0 1 1 0.9625
0 1 0 1 1 0 0 0.9500 – Minimal 9x
0 1 0 1 1 0 1 0.9375
0 1 0 1 1 1 0 0.9250
0 1 0 1 1 1 1 0.9125 – Minimal 8x
0 1 1 0 0 0 0 0.9000 – Default 6x and Super LFM, Minimal 6x, 7x and Super LFM

And the other part is “4.2 Processor Pinout and Pin List”, this indicates the location of VIDs in the socket pinout.

5) First of all the voltage is set by the PLL the exact one that generates clock. Now the modification itself is electrically connecting some of this pin’s to Vcc (logical 1) or Vss (logical 0). That means that for example if we connect pin VID5 to Vcc it will be always in “true” logical state. For example by default 11x multiplier uses 0 0 1 0 1 0 0 - 1.2500V, and with VID5 shortened on Vcc it becomes 0 1 0 1 1 0 0 - 0.9500V. And that will result in nothing else then the complete system failure as soon as CPU enters that state because the minimal voltage for 11x in my case is 1.0750V.
So the very first rule when looking for the pins to shorten is to check that no P stability will suffer. Moving on to VID4 and this time the rule isn’t fulfilled for IDA state.
A bit about 9.000V voltage, as you can see it opens wide modification field from 0.7125 (all 1) till 0.9000V since VID4 from it and lower on is set to 1 and so is VID5 as well, so one way or another there is no point in connecting them.
The other rule you can notice that 1 indicates –x.xxxx V from the combination of all zeros – 1.5V, for example VID6 -0.8V, VID5 -0.4V, VID4 -0.2V, VID3 -0.1V and so on. All of them together in theory would make 1.5-2x0.8+VID0 volts. So further on I will only research shorting to Vcc results.

The first multiplier that was interesting to me was VID3 since the main porpoise of modification to make Super LFM state even more economic. So 0.8V will be set then RMClock will indicate 0.9V VID. The other part that I already mentioned all VID that had VID3 set to 0 will be no longer available and all vid that were in that area will be automatically kicked 0.1V back; that makes the VID table shortened to the following:
6 5 4 3 2 1 0 Vcc (V)
0 0 1 1 0 0 0 1.2000
0 0 1 1 0 0 1 1.1875
0 0 1 1 0 1 0 1.1750– Newly default IDA VID and Default 10x
0 0 1 1 0 1 1 1.1625
0 0 1 1 1 0 0 1.1500 - Newly default 11x
0 0 1 1 1 0 1 1.1375 – Minimal IDA (12x)
0 0 1 1 1 1 0 1.1250
0 0 1 1 1 1 1 1.1125 –Default 9x
0 1 0 1 0 0 0 1.0000
0 1 0 1 0 0 1 0.9875
0 1 0 1 0 1 0 0.9750 – Default 7x
0 1 0 1 0 1 1 0.9625
0 1 0 1 1 0 0 0.9500 – Minimal 9x
0 1 0 1 1 0 1 0.9375 - Newly default 8x
0 1 0 1 1 1 0 0.9250
0 1 0 1 1 1 1 0.9125 – Minimal 8x
0 1 1 1 0 0 0 0.8000 – Newly default 6x and Super LFM

But I can’t get enough and move further on – VID2 makes IDA a step lower then minimal voltage value, 1.125V.
From the first look forcing VID1 to logical TRUE wouldn’t do any bad changes except making IDA minimal voltage VID unavailable, but as the experiment shown 0.7750V are too low for 6x multiplier to operate stable.
This way the only possible resort was VID0, which was successfully moded.

So the final VID table with VID3 and VID1 shortened to logical 1 or Vss:
6 5 4 3 2 1 0 Vcc (V)
0 0 1 1 0 0 1 1.1875
0 0 1 1 0 1 1 1.1625– Newly default IDA VID and Default 10x
0 0 1 1 1 0 1 1.1375 – Newly default 11x, RMClock for IDA
0 0 1 1 1 1 1 1.1125 – Default 9x, RMClock for 11x and 10x
0 1 0 1 0 0 1 0.9875
0 1 0 1 0 1 1 0.9625 – Newly default 7x, RMClock for 9x
0 1 0 1 1 0 1 0.9375 - Newly default 8x
0 1 0 1 1 1 1 0.9125 – RMClock for 8x, 7x and 6x
0 1 1 1 0 0 0 0.7875 – Newly default 6x and Super LFM

To sum up without RMClock management voltages were lowered in all states, with, well I have lost all diapason from 1.0125V till 1.1V and for all minimal voltages in there the closest available value left was 1.1125V. That on the other hand isn’t so bad, since it’s not so far from 11x minimal voltage. Second, when 11x minimal voltage is set to 11x CPU spreads so much heat that the turbine isn’t spinning in full power making GPU overheat while running 3D applications. 0.9125V for 7x and 6x multipliers can’t be assumed as a big loss; furthermore in practice this FIDs are almost never used.
Unfortunately I didn’t have much time to test battery life with voltmode applied. The only time I tested the time extended by 10 minutes, from 4:09 till 4:19 with wifi off and lowest brightness, but unfortunately I forgot to disconnect laser mouse (500 mW/h) for the first hour. I’ll add some descant result a bit later.

6) At last the method of applying shorting connections. Since I already had some experience in BSEL moding Celeron 440 CPU till FSB166 it wasn’t so hard. As the practice shown the best way to connect two distant pins without reformatting CPU bay is to carefully apply relatively thin lacquered cooper wire in the socket. The ends of the wire are carefully striped from all lacquer cover. If you are careful you can skin straight, but if it just keeps cutting of it is possible to bend ends down and to strip the cover only from front side, it will be enough to contact with pin. Remember, the cover is striper only on those parts of the wire that are going inside the socket holes (about 2mm). The wire itself went by the socket side or right between the pin rows, in the second case it is difficult to guarantee that the pins won’t cut through the over if the wire is longer than 3 pin distance. But since we are connecting pins to Vcc the only harm from unwanted VID pin contacting the wire will result in lowering voltage and pc simple won’t start.
VID5 connected to the closest available Vcc:


The author doesn’t take any responsibility for any modifications you do.