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we will have official version post at here this is a open source project
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Meaker@Sager Company Representative
You'll need to consider the ECU signal.
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differential pair routing on pcie singla lanes -
MXM cards talk to the EC, in Clevo case, if there isn't a temperature signal the laptop shuts down in 30 seconds flat.
And there is no lenght matching in none of those differential pairs, and with connectors on both sides there is no ground plane for all those signals, consider changing to a single side connector with all signals on one side, or go for a 4 layer pcb with internal planes, they cost the same as 2 layer pcb's in jlpcb and other chinese board houses. -
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- but the design guide seems didn't defined length matching about different pcie lanes
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http://e2e.ti.com/cfs-file/__key/co...nts-files/639/7851.PCIe_5F00_designGuides.pdf
and same lane length difference should smaller than 5 mil right?? -
Meaker@Sager Company Representative
Just be careful running to spec when you are going to be using a breakout cable. Something you can check with a first prototype but if your design let's you follow better practise then why not?
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MXM to PCIe project
Discussion in 'Sager and Clevo' started by 52571abc, Jul 18, 2019.