So they locked ram down in BIOS/UEFI. Do they have any choices in firmware for it? Like XMP on or off and any timings in the BIOS? R/W Everything might be a little advanced for some. A paid version of Thaiphoon Burner can write to the XMP part of the SPD as well and may have a simpler interface, although still having a learning curve. Was hoping to avoid stepping through that with someone (which may be unavoidable). Last time I did that though, I was working with XMP and SPD for DDR3.
I was running 3600@CL14-17-17 until the new bios was released around June/July (the ones for compatibility with TR2). The new timings give roughly the same performance in tasks the 3600 clock did due to allowing much tighter timings. I've got a really solid IMC on this chip, so pretty happy with it. And no, it needs higher frequency up to around 3200 due to the IF being geared to the memory speed. Above 3200, the benefit to speed drops off quickly. Tighter timings do help, and I'd recommend speed up to 3200, then focusing on the tightest timings after that.
And why go to Zen+. I have a chip in the top 2-3% of Zen 1950Xs where I can do
[email protected] and a strong IMC. Zen is 7% slower than Intel's chips and Zen+ is 4% slower as far as IPC. The average 16 and 18 core Intel chips reach 4.4GHz (
https://siliconlottery.com/pages/statistics ), while SMT works better on AMD chips, so that gap isn't so large, depending on use cases. My use cases don't need the the little extra I would get from 100MHz more and 3% IPC improvement (or around there). So, even not in my case, I would have told most owners of a 1950X not to upgrade as there isn't much difference. If not an OCer, then PBO (precision boost overdrive) would be awesome for a producer or content creator as it will do it all for you and is done well enough major OCers just tell people to use it over manual tuning (which is high praise).
As to laptop memory, you are correct. It will be looser than desktop. And dealing with MEM trace topology is horrible with laptops, and is part of the reason even Intel didn't have near as high clocking ram speeds for a long while. I just hate locked down ecosystems with a passion.
As to my next CPU upgrade, that means the Zen 2 chips really look good to me, and it will be finances at release that determines if I go Zen 2 or Zen 3 (also if I think Zen 3 will go PCIe 5.0 with DDR5, which is a solid, long lasting platform, even if the socket may change in 2021). There is a chance TR will use the same I/O chip as Epyc, or a cut down version of the same, and Zen 3 is already said to be supporting DDR5, while Epyc 2 will support PCIe 4.0 and the Vega 20 7nm cards which are PCIe 4.0 cards.
But that is why I'm waiting. Intel has nothing leaked on that front and should only have a 14nm++ refresh for HEDT (the 9980XE is built on 14nm+, but with some refinements). 10nm Intel HEDT won't arrive until 2020 with the server parts and will go against Zen 3 which will have EUV working. Performance going from DUV to EUV isn't known, but 5nm with EUV seems to be 15% performance over 7nm, so most of the improvements will have to come from uarch that year. AMD may decide for the chip after Zen 3 to go to 3nm as 5nm doesn't offer much for performance (now talking 2021, which Intel should have 7nm around that time frame and should introduce EUV around that time as well). In other words, that is when Intel can correct their ship and should be the most competitive point on CPU hardware (Intel is slacking now and next year, and rumored 10nm chips are eh at best, so this is AMD closing the gap and outpricing Intel, but in 2021, both sides will have process parity, or extremely close on that, making it a uarch fight, something we haven't seen since the intro of x64 chips).
I'm also waiting to see if the VRM get beefed up on boards to support the high frequency line AMD is looking at putting out for server chips (look up the 7371 Epyc chip in the news, bringing the boost clocks on server chips to the mid to high 3GHz range). This suggests AMD will take all performance gains on a couple 16-core and 32-core lines, while the 64-core chip will likely take all in power savings. That means TR 16 core and 32 core speeds, slightly reduced from what is seen on that platform due to needing to fit a server case, etc. If they have the equivalent of working PBO on the Epyc 2 chips that focus on frequency, that way I can get the higher core clocks, then if a server board has the VRM to feed those chips, I'd just build a server and use the 8-channel memory bandwidth (even though supported memory speeds are locked down, the new chips support up to 3200MHz ram in server, and DDR5, the only dimm so far to meet jedec standard is a 5200MHz dimm, and DDR5, when clocked the same as DDR4, still has a 30% bandwidth advantage). So I'm taking a wait and see approach and may just go from TR to server instead.
Problems? See this thread at archive.org.
(jk actually don't know). They're showing only one left in stock and more coming!
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