AMD's Ryzen CPUs (Ryzen/TR/Epyc) & Vega/Polaris/Navi GPUs

As I said, the way the articles up until now were wording it all is weird and probably inaccurate.
However, bear in mind you also discarded my pricing projections of Threadrippers before, even though they turned out to be accurate.
Not saying that this will be a repeat of that (given that there are obvious limits of the manuf. process curve that can't be exceeded), I'm just indicating that 14nmLPP was a proverbial bottleneck that contributed towards Vega's higher power consumption and frequencies considering the kind of process it was vs 7nm and that with those bottlenecks gone, we could (at least hypothetically) see further improvements (but admittedly, none of that is guaranteed and remains hypothetical).

I'm taking everything you posted into account and keeping it at the forefront, but I'm also waiting for final release of Vega 7nm from AMD and see what the end product does as all this talk doesn't always manifest itself accurately in the final product (the numbers from the process improvements alone are probably best case scenario - but, we know that final products sometimes exceed expectations due to other optimizations (which we have 0 clue if AMD decided to do for Vega).

On another end, here's what TwakTown stated on the subject - though they just copied most info from WCCFTECH:
https://www.tweaktown.com/news/62491/amd-vega-20-7nm-32gb-hbm2-up-tflops-400w-tdp/index.html

"The new details on Vega 20 see it coming in at just 360mm2 compared to Vega 10 at 510mm2, a huge 70% reduction in total die size thanks to the fresh 7nm node. This is where a fork in the road happens: AMD can choose power savings with the die size savings, or they can ramp clock speeds up. Vega 20 could benefit from around 55% power savings over Vega 10, or GPU clocks can be cranked by up to 40%, which would also see the now 4-stack HBM2 drawing more power. This would drive the Vega 20 card with 32GB of HBM2 to 400W, or more. AMD could use a moderate 20% gain in GPU clock speeds and reach 300-350W with a performance leap of 65% all while saving 30-40% on power consumption. This would allow AMD's new Vega 20 GPU to beat NVIDIA's current Tesla V100 in compute at 300W with around 20.9 TFLOPs compared to the V100 with 15.7 TFLOPs.

Read more: https://www.tweaktown.com/news/62491/amd-vega-20-7nm-32gb-hbm2-up-tflops-400w-tdp/index.html"

TweakTown and WCCFTECH - or for that matter neither one of us) don't really know what kind of power targets and performance is AMD chasing with Vega on 7nm.
All we have are estimates and projections from non industry sources based on what 7nm shrink in its own right provides.

I'm a bit discouraged if Vega's power consumption doesn't go down more than what 7nm provides... but then again... balanced power profiles tend to drop power consumption quite a lot (so do power saving modes for a limited/small reduction in performance) as does obvious undervolting.

On another end, with 7nm, you'd expect Vega to be able to clock much higher without suffering same power consumption increases due to the new process being optimized for high frequencies and efficiency.

 

I haven't had my coffee, so this is going to be my best attempt to explain without being snappy. Here it goes:

Tweaktown correctly cites the transistor curve I posted, which is the process curve given by GF. It says either 55% power savings or 40% on normalized frequency. You cannot have both. This curve and the numbers for the 14nm transition has had two to three revisions as the process has gotten closer to production, but roughly, these percentages are right, give or take 5% IIRC. Now, AMD said double the efficiency, which roughly means half the power draw, which would suggest 50% on power savings. They also said 35% on processing power. This needs decompressed though, as increase in the processing power can come from other changes. For example, if AMD is using Samsung's HBM2 which clocks to 1.25GHz instead of 900-950MHz for the Vega 64, you are talking about increasing the speed by around 33% or higher. This can increase the performance and be part of the 35% mentioned in the slides. Changes and tweaks to make the architecture work with the node may have also helped with performance. Coming out on a more efficient part of the curve, which taking the 50% reduction in energy consumption can do, could help with heat, allowing better boosting. Any tweaks to reduce latency, having a better interposer or an interposer potentially built on a different node or with a better topology could give increases in performance.

The point is, the curve is the curve and you cannot exit it. This is physics, not subjective like guessing their pricing. We might even find out that AMD tested under very specific conditions and what the market sees on results vary from its public documents. But, that does not mean that we can fully escape that curve. All we can do is look at other contributing factors that can allow for getting both.

Not only that, his math on die shrink inverted the numbers. It would be a 30% reduction in size with those numbers, not 70%. He then ignores that 8GB is around 20W-25W with HBM2, so 32GB is 80W-100W alone, approximately, and he took no reduction in energy consumption, thereby ignoring AMD saying it is 2X as efficient. But, he is trying to do what I did, trying to make the numbers make sense in regards to the process and known factors, but isn't looking beyond process to understand how AMD's numbers differ from the process numbers from GF. It is a good go of it, but that is where he is just missing part of the calculation.

And, considering you have to add 60-75W for the extra HBM2, I don't see why you are so disappointed. If you cut the current power drawings to 150, then add 100 for the HBM2, you would have way better mem in a Ti power envelope with a card that is around a Ti or slightly better for gaming (I don't know Vega's performance on some of the server compute benches, which AMD can crank compute, so....). I think his calculations on energy consumption are high, while mine are low, placing 250-350W to be about right on energy consumption, most likely. I do favor the low side here, though, rather than his calculations. But, I'll admit that bias. If current power draw is 300, split in half, add the wattage of the added HBM2 and any extra needed for the faster speed, add a little more for uncounted variables, and 250W seems right.

 

New AdoredTV video on chiplets and interposers, doing more of a cost analysis:

 

What I have found is that there may be 88 CUs on the Vega 7nm, which would be a significant increase in transistors with the 30% shrink, so the power consumption figures mentioned by Tweaktown may be correct, also with the large performance leap. https://wccftech.com/amd-7nm-vega-20-20-tflop-compute-estimation/
http://ascii.jp/elem/000/001/706/1706234/index-2.html

So I owe an apology on that, as added CUs take up more energy and would agree closer on the performance jump being higher, etc. It still fits within the curve line I mentioned, but there were other factors I did not account for on the chip, such as additional CUs, which also effect power consumption. If the CU part is true, we are looking at a card that I am unsure on how I should calculate performance, as this is not a consumer card. But I did need to update my prior statement and give the reason they are estimating the larger power draw.

 

Ryzen 5 2600 vs. Ryzen 7 2700, 6 or 8-cores for Gaming?
Hardware Unboxed
Published on Jul 15, 2018

 

@TANWare - It's CHRISTMAS! New BIOS from Asrock. You have to upgrade to 2.3, then upgrade to 3.0. http://www.asrock.com/mb/AMD/X399 Taichi/index.asp#BIOS

 

It will be at some point but not yet. At least we have the milk and cookie out so we are now ready and waiting for Christmas.

 

Spoke too soon maybe, Passmark on the CPU went from 25,500 @ 4.0 GHz too 26,500.

 

My ram stable OC went down due to changing the CL and WCL to 16 from 14. At stock memory (2133@CL15 15 15), with a 4050 OC, got in the 3300 range on CB15. Not too bad. But without the tighter timings on 3600, my CB score is down to 3507-3538 from 3560-3575 at 4.05GHz. Small hit, but a hit none the less. My Aida mem read suffered slightly because it isn't liking the 512 for memory channel interleaving, but it doesn't mind 256, so doing that for now (103GBps down from 106GBps).

But, the mem has been tested on HCI memtest to 1000% and Google Stress App Test for 8 hours, as well as an hour on TM5.

Mixed bag, but plenty more to dig through. Considering they took down the BIOS, we may see another update pushed soon. So, playing with it and reporting anything we notice to them could help. I really like not getting the 6 beeps on startup anymore (from mem OC), and 3733 did start by putting everything to auto and trying timings from my Custom set on Ryzen DRAM calc only kicked an error after a minute or two, so I may try to find a stable 3733 instead of trying for a 3466 or some slower speed with tighter timings. We'll see where that goes.

 

Deals;
https://hothardware.com/news/amd-ryzen-threadripper-1950x-amazon-prime-day

 

****, getting the 8-core just to get on the platform would be a sweet deal at $300.

 

RX580 / RX560 / VEGA 56 price / performance sweet spots, at least for now:

Graphics Card Pricing July Update, Which One is The Best Value Today?
Hardware Unboxed
Published on Jul 19, 2018

 

A History Of Why AMD Has Lost
Good times and Bad times
UFD Tech
Published on Jul 18, 2018
AMD has struggled. A lot due to Intel's shadiness, a lot due to Nvidia's shadiness. However, it cannot be denied that they would still struggle be the top dog even if there was no Team Blue or Green.

Spoiler: Sources...

Sources:
• http://bit.ly/2LmvuQD
• https://nyti.ms/2L2yP85
• http://bit.ly/2uI9YLL
• http://bit.ly/2ydJ4AF
• http://bit.ly/2LpANyZ
• http://bit.ly/2uueYV2
• http://bit.ly/2Nncteo
• http://bit.ly/2uMQG8i
• http://bit.ly/2LsONEH
• http://bit.ly/2uFTns5
• http://bit.ly/2uuf3rO
• http://bit.ly/2Lsbx7L
• http://bit.ly/2L7Dlm1
• http://bit.ly/2O0hSJx
• https://zd.net/2zPK8Lz
• http://bit.ly/2mncpzE
• http://bit.ly/2mqx0TB
• http://bit.ly/2Lpyvwi
• http://bit.ly/2JxURda
• http://bit.ly/2msf0IQ
• http://bit.ly/2JyNVfQ

 

What he said on the focus of Navi over Vega comes from a disgruntled employee and a lack of addressing that independent software vendors said screw implementing NUMA, a necessity for implementing multi-die at the moment. If not for that, his talk on Vega and Navi would be fully refuted. But, cannot control the market.

 

https://www.overclock3d.net/news/cp...t_ryzen_am4_cpus_with_more_than_eight_cores/1

 

Seen that... if accurate, then what will AMD be shooting for in regards to TDP?
Seems to me that at same TDP they can increase performance by 40% (equating to roughly 60% increase in frequencies without taking into account IPC increases).
Alternatively, they could also reduce the TDP and still increase performance by overall 40% (with frequency and IPC increases).
Still, we also need to keep in mind that 7nm will be designed for high frequencies and efficiency... meaning, that voltage requirements at much higher frequencies will be lower vs now, and that certain hardware parts will be looking at about close to/or 5GhZ base as is.

Will be interesting.

 

My concern is the rumored 10-15% IPC increase. This seems too small, we need to see 25% or better too nail the coffin for Intel.

https://finance.yahoo.com/news/amd-ryzen-desktop-cpus-2019-190407861.html

 

AMD May Be About to Beat Intel at Its Own Game
Michael Feldman | July 20, 2018 19:16 CEST
https://www.top500.org/news/amd-may-be-about-to-beat-intel-at-its-own-game/

"The upcoming battle between AMD’s “Rome” server CPU and Intel’s “Ice Lake” Xeon scalable processor promises to be an interesting matchup. But this time around, AMD could have an advantage it has never had before.

Rome, which will be based on AMD’s second-generation Zen architecture (Zen 2), is scheduled to start sampling in the second half of 2018, with full production in 2019. It will be manufactured by either TSMC or GlobalFoundries, or perhaps both, using their respective 7nm process technologies.

According to the latest rumors, the chip will deliver a 10 to 15 percent improvement in instructions per clock (IPC) compared to the first-generation EPYC processor and will be equipped with up to 64 cores. That’s a doubling of the core count of the EPYC CPUs, which are being manufactured by GlobalFoundries on its 14nm process.

Very little is known about Ice Lake, Intel’s next-generation Xeon microarchitecture that will purportedly be built on the company’s 10nm semiconductor process. The Power Stamp Alliance has provided a few details revealing the product will include up to eight memory channels and draw as much as 230 watts of power. That suggests a higher count than the current “Skylake” Xeon-SP processors, which top out at 28 cores. It could also mean special IP blocks – graphics processing, extra-wide vector units, integrated FPGAs, etc. – will be offered as part of the package.

What is better known is that Intel’s 10nm technology has suffered multiple delays and is currently not expected to be ready for mass production until sometime in 2019. Originally, the chipmaker was planning to deliver its “Cascade Lake” Xeons on 10nm as a process shrink of “Skylake,” but the delays forced them was to move this product to their latest 14nm node (14nm++). The Cascade Lake Xeon-SP is slated for release later this year.

As a consequence, Ice Lake’s debut on 10nm will be one of those rare instances where Intel will advance the microarchitecture and process node of a Xeon product in tandem. The state of affairs was summed up by Intel CEO (and now ex-CEO) Brian Krzanich, during the first quarter earnings report back in April:

“We continue to make progress on our 10-nanometer process. We are shipping in low volume and yields are improving, though the rate of improvement is slower than we anticipated. As a result, volume production is moving from the second half of 2018 into 2019. We understand the yield issues and have defined improvements for them, but they will take time to implement and qualify. We have leadership products on the roadmap that continue to take advantage of 14-nanometer, with Whiskey Lake for clients and Cascade Lake for the data center coming later this year.”

Anyone who has been following the semiconductor tech space knows that transistor feature sizes advertised by different manufacturers are not comparable. In other words, a 10nm Intel process is not the same size as a 10nm process from TSMC. That’s mostly because there are different ways to measure transistors geometries in the era of 3D FinFET technology. In general, Intel is more conservative with its measurements, such that its nodes correspond to smaller nodes from Samsung, TSMC, and GlobalFoundries.

So how will Intel’s 10nm technology match up against the 7nm process nodes from TSMC and GlobalFoundries? If you can believe Scotten Jones’ analysis at SemiWiki.com, the three are pretty much on par, although the 7nm nodes from both TSMC and GlobalFoundries have a slight edge when compared Intel’s 10nm node. Jones uses a “standard node” designation that normalizes feature sizes across manufacturers based on transistor density.

His overall conclusion is that “Intel has lost their multiyear density lead over the foundries.”

In a write up by Mark Hibben at Seeking Alpha, he overlays the process nodes on top of Jones’s data to offer a clearer picture of what’s going on:
Source: https://seekingalpha.com/article/4151376-tsmc-intel-lead-semiconductor-processes

The bottom line is that for the first time, AMD server chips will likely be manufactured with better transistor densities than competing silicon from Intel. As we’ve reported previously, the EPYC CPUs already have a number of architectural advantages over the Skylake Xeon-SP products. A process node advantage could enable the Rome processors to be more competitive in basic areas like clock speed and energy efficiency.

That said, the actual differences in transistor density between Intel’s 10nm node and the 7nm nodes from TSMC and GlobalFoundries appear to be relatively small. Plus, architectural design tends to be much more important than transistor size, especially when the differences are not all that significant. On the other hand, even reaching parity with Intel in process technology is a huge accomplishment for AMD.

There is, however, one other development in AMD’s favor. The Rome processors seem to be pretty much on schedule for a 2019 release date. In June, AMD CEO Lisa Su held up a same chip at the Computex computer tradeshow in Taipei. Meanwhile, Intel hasn’t offered much in way of a timeline for the Ice Lake rollout. If the company releases the 14nm Cascade Lake Xeon-SP later this year, there would be little incentive to follow it with a new CPU that would make its predecessor immediately obsolete. Plus, Intel’s 10nm problems may prevent good yields of the chips until much later in 2019. The gang at Wccftech are reporting that the Ice Lake-SP processors aren’t expected to arrive until 2020, which would give Rome a year head-start over its targeted competition.

Either way, AMD prospects for growing its datacenter business is probably the best it’s been since the early days of the Opteron CPU. And while Intel has plenty of experience in leap-frogging its competition, in the short-term, it may not have very many options to exercise. As always, we’ll have to wait and see how it plays out."

 

Just too add my two cents. One of the rumors is for TR at 7nm to only have 32 cores. I would then wonder if AMD is looking to go back to only 2 active CCX blocks with the core count increase so that IF is not over stretched with the fast chips?

 

Intel only has 5% advantage in IPC over Ryzen 1.
So, 10-15% IPC increase would be good... couple that with frequency increases close to or past 5 GhZ across all Zen 2 line, and you're set.

Can't expect really high IPC boosts every time... it was great AMD was able to close the gap as is with Ryzen 1... they exceeded their own projections... but it depends how much more they can improve on it.

 

TR line may remain at 32 cores, but the clock increases would be quite big along with IPC boost.
Since Ryzen 1 required roughly 15% frequency boost to gain 10% performance, you're looking at about 60% frequency boost to achieve just that (not counting better IPC).
Still, I doubt it would be as cut and dry.
But, that also means that TR 32c could easily have a base clock of about 5 GhZ (which is about 45% frequency uplift from TR2 - and we know that AMD only managed 10% uplift in best case scenario with the refresh - which would result in about 15% frequency uplift - and we've seen that frequencies didn't even go up by 10%) at current TDP and higher IPC.

I'm probably counting more towards 45% boost in frequency and rest coming from IPC on Zen 2, because if a Ryzen 1 is clocked at 3.6GhZ base, that means a 60% frequency uplift would land it at 5.76GhZ... which seems... too much?
I mean, I know the 7nm node is designed for high clocks and efficiency, but is it THAT good?
Meh... maybe for overclocking, but I don't know about base clocks (still, the voltage requriements at much higher frequencies would be far lower).
Intel can overclock to 5GhZ with about 1.3-1.4V.... On 12nmLPP, AMD needs that much just to get 4.1-4.2 Ghz across all cores (and anything higher results in diminishing returns in regards to performance due to node limitations).

Usually when a new node is announced, AMD tends to use performance gains from the node as 'wholesome increases' (frequency and IPC)...
I know that 7nm gives 40% increase in performance over Ryzen 1, but AMD was never clear on whether that means just from the frequency boost or, is it frequencies AND IPC?
That's why a 60% frequency boost (while 'great' at least on a hypothetical basis) to gain 40% performance uplift seems quite a bit... and why 45% boost in frequencies (with another 10-15% coming from IPC) might be more realistic?

But then, just because ryzen 1 needed 15% boost in frequency to get 10% performance, doesn't mean Zen 2 will operate the same (though, it IS Zen architecture still... just improved).

Plus, how much more of a performance boost would Zen 2 users get from high frequency RAM?

 

Thank you. This is the article I keep referencing for nodes that I couldn't find after reading (the semiwiki article, not the seekingalpha article). I will review the seeking alpha article and respond to other posts shortly.

For the leaked IPC of 10-15%, remember when Ryzen was coming out and Intel thought nothing was there because board partners had crappy early silicon with low IPC and so they then tried to push the blame onto AMD for their incompetence in both board design AND firmware? I do. Intel even put out Kaby and a new chipset so that the MB mfrs focused on that BIOS instead of doing anything for AM4. Then, they got blind sided.

But, with that, you also need to consider IPC is not clock speed. Add 1GHz of clock speed plus 10-15% IPC (which matches my calculations and predictions at the start 6-9 months ago), and you have a pretty good chip. It still comes in under Intel's IPC, which is a shame, though, while speeds will match Intel when overclocked. So six of one, half dozen of the other. I also question if and whether they are playing with the interposer or not, whether they sampled without interposers, etc., which due to reduction in latencies should have a larger impact on IPC (although they could just be saving that for Zen 3, which is smart, but evil for those that plan to upgrade next cycle).

But, I haven't had my coffee yet, so grains of salt on my statements here.

 

EDIT.... I'll be the last one to complain if AMD manages 20-25% IPC boost though... but right now, even the 10-15% IPC boost is a mere rumor.
Nothing is definitive as of yet.

 

So, update with quality IPC comparison.
https://www.sweclockers.com/test/24701-intel-core-i9-7980xe-skylake-x/19#content

This shows all chips running at 2.8GHz compared. We can see that Intel's 8700K only had a 7% IPC performance (ignoring latency, cache speeds, etc., that cannot be controlled for) over the 1800X and 1700X. That shrunk slightly with the 2000 series. So, getting 10-15% IPC is going to create half of the current gap or the amount of the current gap between the 1800X and 8700K, except in AMD's favor, for the 8700K to the Zen 2/Ryzen 3000 series. When you see that the process should allow for around 5GHz speeds in addition to the IPC increase, thereby matching Intel on overclocked speeds, you have AMD fully caught up or exceeding Intel. That is a phenomenal feat, especially since we already know that AMD wins on multithreaded applications and will now also be at the same level on single core performance. I really am not seeing why people are saying they are unimpressed with that news, especially if they are talking 10-15% over Zen+ instead of Zen.



This shows that clock for clock in CB, the single threaded performance was only around 3.6% (he stated 4%, which is an accurate round up) ahead of Zen+ when comparing it to the 8700K. With the PCMark, it is pretty well matched in multithreaded, and also matched in Monte Carlo simulation. Little slower (like 3%) in Carona, and another render (handbrake) was not able to leverage the Ryzen chip as well. Blender was 4% slower. Just 1% slower in V-ray.

Now, when you get to gaming, the latency is the killer, which is why I hope the talk of interposers is true (along with the benefit for other use cases).

So I hope that adds some perspective here.

 

So far, with TR, everything I thought is true. First rumors were for a 1990x but we ended up with the 1950x. Probably this was a 4 CCX stepping 1 iteration but since memory speeds were low on the Ryzen plaform so that early the IF would struggle. Also it was rumored the 1990x had to be stepping 2 as well. So along with heat and VRM issues the 1990x was benched.

I think stock speeds of the new TR push the IF, VRM, memory bandwidth and TDP heat to the edge. OC just pushes it harder making it essentially spin its wheels. So that we end up with diminishing returns.

This is why I think AMD would like to at 7nm return to just 2 CCX blocks with their own dedicated memory connection. the new 7nm with the new TR 4 CCX configuration would also experience diminishing returns where as EPYC and its quad channel memory configuration does not have the same issues.

Above is all speculation of course, salt shakers a required reading tool!

 

But, this is where the rumors of the control chip and the interposer becomes more interesting. The interposer would drop latencies down to about 25-33% of current latencies for inter-core communications overall. It also would allow for the L3 victim cache to be centrally located between the dies, thereby having the same call latencies roughly that are seen for certain inter-core calls. That would better work with the IMCs and I/O on the controller chip, rather than the dies, so that it is feeding into the L3 cache before out to the dies. By doing such, you free up a lot of room on the dies, resulting in ability to add more CCXs or cores per CCX. It also removes the equation of memory speed controlling inter-die comms or inter-CCX comms due to Infinity Fabric being tied to the single rate speed of the memory (and how the timings effect the IF being a black box). Considering the cost of the interposer, including failed incorporation costs, is like adding one more die if done on the 40nm node for a 1-10% active interposer, we could see a large improvement if the change is being implemented on Zen2.

But, as you said, salt shakers!

 

@TANWare - BIOS 3.1 is up http://www.asrock.com/MB/AMD/X399 Taichi/index.asp#BIOS

 

Official: AMD now stands for All the Money, Dudes!
Radeon and notebook surge brings best quarter in seven years
By Shaun Nichols in San Francisco 25 Jul 2018 at 23:54
https://www.theregister.co.uk/2018/07/25/amd_q2_fy2018_record_quarter/

"AMD is crediting the continued success of Ryzen processors and Radeon graphics chips in fueling its best quarter since 2011.

The other-other CPU vendor turned in a massive Q2 FY2018 on Wednesday with big gains in both sales and net income. For the quarter, ending June 30:

• Revenues of $1.76bn were up 53 per cent from $1.15bn in Q2 2017.
• Net income of $116m brought AMD into the black from a $42m loss in the year-ago quarter.
• Non-GAAP EPS of $0.14 compared to a loss of $0.01 a year ago and topped analyst estimates of $0.13.
• Computing and Graphics group revenues were $1.09bn, a 64 per cent jump from Q2 2017.
• Enterprise, embedded and semi-custom revenues were $670m, a 37 per cent year-over-year jump.
• A drop in blockchain revenues was noted from quarter to quarter, and AMD chief exec Dr Lisa Su admitted blockchain numbers were lower than expected.
• AMD says that, for the first time, Dell, HP and Lenovo are all offering its chips in both their notebook and desktop lineups.

"As expected, AMD had another solid growth quarter with 2nd gen Ryzen, Ryzen mobile, and Epyc all ramping strong, leading to an overall 54 per cent revenue gain," noted analyst Patrick Moorhead of Moor Insights and Research.

"Ryzen units grew double-digit sequentially and Ryzen mobile doubled sequentially. Radeon graphics sales were down driven by a decline in blockchain revenue, but in the grand scheme of things, not very large, a 4 per cent decline."

While touting the solid numbers, Su painted a bright picture for AMD's near-term future, particularly the company's looming move to 7nm in both its CPU and GPU chips, set to begin later this year and continue into early 2019.

"We bet heavily on 7nm, we thought 7nm would be a big node for the industry," Su told analysts on a conference call.

"When you look at where we are today on the CPU side, we have the first silicon on our Rome products, it looks really good."

Su also said AMD will look to up its spending in the software space as it looks to squeeze more performance from its silicon.

"We have a lot of opportunity on the software side across CPUs and GPUs to accelerate some of our machine learning work," Su said, "and that is where incremental R&D would go."

Investors were enthusiastic about the soaring revenues, and AMD stock was up 5 per cent after-hours at $16.88 per share."
Comments

 

AMD EPYC Airport Ads Punch Close to the Belt
by btarunr Monday, July 23rd 2018 07:14 (38 Comments)
https://www.techpowerup.com/246220/amd-epyc-airport-ads-punch-close-to-the-belt

"Airports are the latest battleground for AMD and Intel as the two vie to catch the attention of IT managers in the midst of an AI and big-data inflection point that promises to trigger a gold rush for enterprise processors. AMD took to San Jose International Airport with its latest AMD EPYC static ads targeted at IT managers stuck with Intel Xeon for its historic market leadership. AMD EPYC processors offer "more performance, more security, and more value" than Intel Xeon processors, the ads claim, but not before landing a mean punch in the general area of Intel's belt."

 

Where is Thunderbolt on Threadripper?! Here it is, but...
Level1Techs
Published on Jul 29, 2018
What's the hold up with Thunderbolt on Threadripper? Is there some technical limitation?
Here we show off the Gigabyte Designare X399 w/the Gigabyte Alpine Ridge TB controller. We got it working on our own -- it's a DIY solution.
Don't expect to buy these parts and have it magically work. It won't.
But if you can add some secret sauce firmware in just the right places, and tweak a kernel module here and there....then Thunderbolt 3 works just great! (Except hot plug, we couldn't get that working.. well kinda?) It would appear to us that we're just waiting on certification. Maybe intel is dragging their heels certifying?
We have a lot more footage to show than just this -- but we're hoping this video kicks off some conversation around Thunderbolt on Threadripper.
We don't want to say too much about how we did it. But you can figure it out, we promise. Who needs it? What's the use case? And what's up with hot plug?

 

https://wccftech.com/exclusive-amds-threadripper-2990x-4-ghz-on-air-new-wraith-coolers/

 

That's odd, why no press from that event? Ferrari can take the patron's money but won't allow them to benefit from the event publicly?

So, nothing of note was publicly released at that event, AMD has already shown the new Cooler Master built Wraith for ThreadRipper 2.

 

I find this highly suspicious as well. I have been scouring all day looking for anything of substance. Dates, firm prices, Data, display examples, anything at all.

 

It's Called Marketing: AMD to Hold Threadripper Event in Partnership With Scuderia Ferrari
by Raevenlord Monday, July 2nd 2018 10:09
https://www.techpowerup.com/245675/...er-event-in-partnership-with-scuderia-ferrari

 

I have no issue with them sponsoring an automotive team. I would rather them sponsor one for an auto I would want to have, such as a modern Corvette team. It would align with their mission being a cost effective high performance solution. Even the sinking in the same amount of money they do now, but that is me.

 

Nah, unless AMD are a partner in a technology that AMD benefits from selling into the automotive market - there's nothing but prestige at stake.

AMD is just coming back into profitability, and given the slim budgets we've seen with few people assigned to some projects, I can imagine far better ways to spend the money than to sponsor an automotive team.

AMD see's the "Dinosaur" in the Xeon and IBM in the datacenter, but AMD is still blind to fossil fuels racing sponsorship.

If AMD can get in on sponsoring cutting edge battery technology where AMD are a technology contributor, adding some $ to help push that forward might be helpful, as long as AMD benefit's long term.

AMD would do much better sponsoring racing "games" and competitions with those games.

Think PC and Consoles AMD, keep your $ investments moving your business forward, and stop endorsing others frivolous extravagant consumption.

 

Below they are rumoring the 2990wx is to come with a water cooler and this then might explain the higher price. A $350 perium though is quite high for a water solution AIO but we have not seen it yet.

https://www.notebookcheck.net/AMD-Threadripper-2970X-2950X-specs-leaked.320054.0.html

 

This is not the way of Automotice sponsorship. Where does General Mills and Cheerio's benefit from a Nascar sponsorship?. So I do get it. It does not mean they should stop there and look into like minded advanced technologies as well.

 

Ferrari (NYSE:RACE) to Wear ADM (NASDAQ:AMD) Logo on F1 Cars
https://www.livetradingnews.com/ferrari-nyserace-to-wear-adm-nasdaqadm-logo-on-f1-cars-82931.html

 

While still off topic, not everyone uses Viagra amongst a hord of other product's. So I still get it. as far as who was left hanging with what, well? AMD could have easily put out more details and it chose not too.

 

Ferrari is the first racing stable to show its new car for the 2011 Formula 1 season. The F150 is the weapon with which Fernando Alonso and Felipe Massa have to rake the championship for the first time since 2007.

 

Maybe I am too cynical but I think something else may be up, and not good. It could have to do with the huge investment sell off today.

https://markets.businessinsider.com...ala-sells-427-million-stake-2018-7-1027417981

 

Ferrari's have been cruising around with that AMD logo since 2002.

 

Not only that, I think that same company is a major equity holder in GF and had been unwinding it's position there slowly as well, IIRC.

Sent from my SM-G900P using Tapatalk

 

Also, did you see TSMC's non-answer to whether the server chip they referenced for next year would be x86 or ARM? http://www.tsmc.com/uploadfile/ir/quarterly/2018/2R5bO/E/TSMC 2Q18 transcript.pdf (go to Q&A on page 10)

Michael Chou - Deutsche Bank AG, Research Division - Semiconductor Analyst
Second question, regarding 7-nanometer progress. You mentioned you will do server CPU, if I heard you right. So would that be ARM-based or x86 or you cannot give color for that?
C. C. Wei - Taiwan Semiconductor Manufacturing Company Limited - CEO & Vice Chairman
It's too specific. So it's a CPU.

 

GLOBALFOUNDRIES
100% owned by Mubadala with operations across the globe, is a leading full-service semiconductor design, development, fabrication and innovation company.
https://www.mubadala.com/en/what-we-do/semiconductors/globalfoundries

Mubadala says IPO of GlobalFoundries possible in future
By Larry Rulison Updated 3:57 pm EDT, Thursday, May 10, 2018

Spoiler

"If GlobalFoundries wants to win a larger piece of the computer chip market from Taiwan Semiconductor Manufacturing Co. and fight off a surging Samsung, it will likely have to grow much larger.

At least for now, however, raising new capital in an initial public offering isn't part of the company's immediate plans to scale up.

But an IPO could potentially be in the cards at some point in the future, according to Khaldoon Al Mubarak, the CEO of Mubadala Investment Co., the Abu Dhabi investment fund that owns GlobalFoundries.

Bloomberg TV reporter Erik Schatzker asked Al Mubarak about an IPO during a sit-down interview that was published Thursday but appears to have been filmed earlier in the week when Al Mubarak visited Fab 8 as part of a weeklong tour of the United States.


"What ultimately validates GlobalFoundries as an investment? An IPO?" Schatzker asked Al Mubarak.

"Could be," Al Mubarak said after pausing for a few seconds to consider the question. "Ultimately, that could be an option. I don't think we're there today. But I believe certainly when the right time comes... an IPO is something that would make sense, maybe. But not now, certainly not now."

Mubadala is the sole owner of GlobalFoundries, which means it is privately held and doesn't have the pressures from Wall Street that come with having its stock traded by the public.

Right now, GlobalFoundries is the No. 2 computer chip foundry in the world behind TSMC. But it's an uneven fight. TSMC has more than 50 percent of the market with $32 billion of the $62 billion in worldwide foundry sales in 2017, according to IC Insights.

GlobalFoundries by comparison had $6 billion in revenue, giving it a hold on the No. 2 spot, although Samsung, which had $4.6 billion in foundry sales in 2017, recently announced plans to spend $6 billion on a new cutting-edge chip factory in Hwaseong, South Korea that will help it gain market share in the foundry business.

Despite Samsung's push to knock off GlobalFoundries and eat more of TSMC's business, GlobalFoundries isn't going away any time soon.

Al Mubarak was in Malta on Monday in part to make the case that Fab 8 and GlobalFoundries, the biggest U.S.-based foundry company and the sole maker of high-end chips for the Department of Defense, is a "national asset" deserving of federal support for things like utility infrastructure, workforce development and research and development.

Such support would be likely if GlobalFoundries seeks to build a second factory at its Fab 8 site in Malta, where it currently employs between 3,300 and 3,500 workers. Such a project could cost as much as $10 billion, and the company would likely need as much as $2 billion in government financial assistance and tax breaks to move forward..

Al Mubarak stressed in his interview with Bloomberg that Mubadala has spent $15 billion over the past 10 years at the Fab 8 site, including research expenditures.

" This is a huge investment," Al Mubarak said. "This is a massive long-term play.""

 

MSI B450 Tomahawk Socket AM4 Motherboard Review + Linux Test
Level1Techs
Published on Jul 31, 2018
5:01: VRMs
10:56 : Memory Tests
18:50: Linux Test

 

@ajc9988 well bios 3.20 is up https://www.asrock.com/MB/AMD/X399 Taichi/index.asp#BIOS

 

In news;
https://www.tomshardware.com/review...rair-ma621p-threadripper-air-cooler,5664.html
https://www.notebookcheck.net/AMD-R...it-4-GHz-on-all-32-cores-on-air.320210.0.html

 

@TANWare -

Posted this in Asrock forum, but could you test the same on your system?


3.20 is no good. At 3466, I am seeing the same score in CB15 as if running stock 2133. I saw this in the last one as well, where 3466 would have my score in CB15 around 3515, still down from my regular, but fine. But, even though I didn't get 3600 or 3733 stable, AIDA64 reads the bandwidth going up, but 3600 or 3733, even expecting error so erroneous scores, it goes right back to stock scores of around 3300 (Core at 4050).

I did 3466, which seemed stable, no errors in any cursory testing with HCI or with TM5, and the CB15 score was the same as stock, even though AIDA64 read bandwidth of 100 or 101GBps. So something is NOT right with this one. So I'm not sure what they did, but things changed. I also saw that when I go to manual for the SOC, it is at level 1 now. I move it to level 2, but that was a change I noticed. I also have to go up one more tick on the core voltage even using level 2 to get my 4050 OC stable.

But, cursory looks at the BIOS.